Visual Studio 7.5.2 Series Of Hardware#

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The Board or Device is the hardware that contains one or more devices required for the executable to run. Throughout this document the connection will also be called the Debug Probe. The connection is the piece of hardware between the host PC that runs CCS and the device or board where the code is supposed to be executed.

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This file also contains the exact specification of the Device or Board being used.Once the Target Configuration File is created and all the appropriate hardware is connected and powered up, the debugger is ready to be launched.The elements of the debug subsystem are shown above and are processed in the following manner: This file is populated with the appropriate Debug Probe type (XDS, ICDI or MSP-FET) and host interface (USB or Ethernet). Cypress Studio provides a visual way to generate tests within the Test Runner.This setup, when used with CCS, allows the host PC to communicate with the target, load data and code, control the execution of the program loaded via breakpoints, watchpoints and step operations, as well as read data back to the host PC to be displayed in views such as Watch, Memory and Disassembly.To properly make CCS aware of the physical aspects of the debugging environment, a Target Configuration File must be created. Try our 64-bit Visual Studio that is faster and more reliable than ever.Projects will now open much faster on MacOS Big Sur with improved browser.

Visual Studio 7.5.2 Series Of Hardware

The CCS debugger performs one last step: it automatically sets a breakpoint in the device memory address that corresponds to the function main() and runs the device until it breaks at it.As mentioned in the Debug Overview section, Target Configuration Files are responsible to describe the physical aspects of the debugging environment.The Target Configuration File is a plain text XML file that has a. For Flash based devices, the built-in flash programmer automatically handles the flashing process. The placement of this code follows the directives on the Linker Command File.- The debug symbols are kept in the host PC to allow correlating the memory addresses of the device/board with the source code of the project.- The process is the same whether the code is being downloaded to RAM or Flash. If loading an executable, the CCS debugger splits the information of the executable file:- The contents of both code and data sections are sent through JTAG and stored in the appropriate memory locations of the device/board. Once this communication is established, the CCS debugger starts executing a series of hardware initialization commands from a GEL script (if one is configured in the Target Configuration File. CCS then parses the Target Configuration File, creates a Debug Configuration and uses the information in these two files to connect to the JTAG debugger and communicate to the device in the target.

This method is very simple as it automatically assigns the correct device and set it as the Active target configuration for the project The file is placed in a subdirectory named targetConfigs inside the project directory Simply search for the part number of your development board and find out the appropriate setting. Common selections for the Connection can be found at the page Common Target Configurations. The Device XML file contains the internal JTAG structure of the device and can optionally include several Module XML files, which describe a deviceвЂ™s peripheral registers.Despite the complexity, there are two simple ways to create the Target Configuration File: either automatically or manually.This method automatically creates a Target Configuration File when creating a project or modifying its properties.To create it, simply find out which Debug Probe model (XDS, ICDI, MSP-FET) and interface (USB, Ethernet) is used by your hardware and set this parameter in the drop-down menu Connection in the New Project Wizard or in the Project settings.

If such editing is required, check the section Adding GEL Files to a Target Configuration.- Another important setting is the JTAG Mode of operation (JTAG, cJTAG, etc.) of all XDS Debug Probes except XDS100v1 and XDS100v2. This is covered in detail in the quicktip videos Experimenting with JTAG clock speed and Experimenting with XDS110 JTAG clock speed in the References section.- GEL files are automatically added to all board configurations and several devices, therefore only need to be added/modified if a specific demand is required. Advanced target configuration options В¶The procedure above mostly covers the Basic tab of the Target Configuration editor, but other two tabs are also important:The Advanced tab allows configuring important parameters of the Debug Probe (mode of operation, clock speed, special signaling, endianess, among others), the deviceвЂ™s internal JTAG structures (addresses, ports, cores) and the addition/removal of GEL files.- One of the most common Debug Probe settings is the clock speed. From the project itself by right-clicking on the project and selecting New в†’ Target Configuration File.7.2.1.4. From the Target configurations view (menu View в†’ Target Configurations), click on the new target configuration button Menu File в†’ New в†’ Target Configuration File.

If the debugger is launched automatically on a project (using the Debug Launch button ), the Debug Configuraton has the same name as the project. Debug configurations may be cached and reused for future sessions that use the same configuration.The name and physical location of the debug configuration is determined by how the debugger is launched. A Debug configuration can be manually created by going to menu Run в†’ Debug Configurations, or it is automatically created when the debugger is launched. Eclipse FAQ about Launch configurations: What is a launch configuration?Debug Configurations are unique for each workspace.

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